搞不清楚vhdl脾气

    今天搞了很久，就是希望把一个写signal的逻辑写进cpld，结果搞了很久都没有搞定，总是报资源不足，真搞不懂它的资源怎么分配的，资源不足时的代码如下（限于篇幅，这里只贴前后对比的代码）：
pwm_set_procscreen.width/2)this.style.width=screen.width/2;>rocess(reset_l,pce1_l)
    begin
       if (reset_l = true_l) then
           count_prd(14 downto 7) <= "00001111";
           count_llev(14 downto 7) <= "00000111";
       elsif ((pce1_l = true_l) and (ah = dsp_reg_addr)) then 
           if (al = pwmprd_addr) then
               set_pwmprd_l <= true_l;
               count_prd(14 downto 7) <= gd(7 downto 0);
           elsif (al = pwmllev_addr) then
               set_pwmllev_l <= true_l;
               count_llev(14 downto 7) <= gd(7 downto 0);
           else
               set_pwmprd_l <= false_l;
               set_pwmllev_l <= false_l;
           end if;  
       end if;
end process pwm_set_proc;
这样的代码，一直都没有办法成功编译进cpld，后来，我查看了前面的代码，把一段写led的代码copy过来，稍加修改：
pwm_procscreen.width/2)this.style.width=screen.width/2;>rocess(pwe_l)
                      begin
                          if(pwe_levent and (pwe_l=false_l)) then
                              if((ah=dsp_reg_addr) and (al=pwmprd_addr)) then
                                  set_pwmllev_l <= true_l;
                                  count_prd(14 downto 7) <= gd(7 downto 0);
                              elsif((ah=dsp_reg_addr) and (al=pwmllev_addr)) then
                                  set_pwmprd_l <= true_l;
                                  count_llev(14 downto 7) <= gd(7 downto 0);                       
                              else
                                  set_pwmllev_l <= false_l;
                                  set_pwmprd_l <= false_l;                                  
                              end if;
                          end if;
                      end process;
这样就搞定了，可以编译进资源了，看来一个工程中，如果多个process采用类似的信号处理方法，会更易于综合。